/**
  ******************************************************************************
  * @file    zb32l03x_hal_i2s.h
  * @author  MCD Application Team
  * @Version V2.0.0
  * @Date    2022/08/23
  * @brief   Header file of SPI HAL module.
  ******************************************************************************
  */

#ifndef ZB32L03x_HAL_SPI_H
#define ZB32L03x_HAL_SPI_H

#ifdef __cplusplus
extern "C" {
#endif

#include "zb32l03x_hal_def.h"

/** @defgroup SPI_Exported_Types SPI Exported Types
  * @{
  */

typedef enum
{
    SPI_MODE_SLAVE                = (0x00000000U),
    SPI_MODE_MASTER               = (SPI_CR1_MSTR | SPI_CR1_SSI)
}SPI_ModeTypeDef;

typedef enum
{
    SPI_DIRECTION_2LINES          = (0x00000000U),
    SPI_DIRECTION_2LINES_RXONLY   = SPI_CR1_RXONLY,
    SPI_DIRECTION_1LINE           = SPI_CR1_BIDIMODE
}SPI_DirectionTypeDef;

typedef enum
{
    SPI_DATASIZE_8BIT             = (0x00000000U),
    SPI_DATASIZE_16BIT            = SPI_CR1_DFF
}SPI_DataSizeTypeDef;

typedef enum
{
    SPI_POLARITY_LOW              = (0x00000000U),
    SPI_POLARITY_HIGH             = SPI_CR1_CPOL
}SPI_CLKPolarityTypeDef;

typedef enum
{
    SPI_PHASE_1EDGE               = (0x00000000U),
    SPI_PHASE_2EDGE               = SPI_CR1_CPHA
}SPI_CLKPhaseTypeDef;

typedef enum
{
    SPI_NSS_SOFT                  = SPI_CR1_SSM,
    SPI_NSS_HARD_INPUT            = (0x00000000U),
    SPI_NSS_HARD_OUTPUT           = (SPI_CR2_SSOE << 16U)
}SPI_NSSTypeDef;

typedef enum
{
    SPI_BAUDRATEPRESCALER_2       = (0x00000000U),
    SPI_BAUDRATEPRESCALER_4       = (0x1UL << SPI_CR1_BR_Pos),
    SPI_BAUDRATEPRESCALER_8       = (0x2UL << SPI_CR1_BR_Pos),
    SPI_BAUDRATEPRESCALER_16      = ((0x2UL << SPI_CR1_BR_Pos) | (0x1UL << SPI_CR1_BR_Pos)),
    SPI_BAUDRATEPRESCALER_32      = (0x4UL << SPI_CR1_BR_Pos),
    SPI_BAUDRATEPRESCALER_64      = ((0x4UL << SPI_CR1_BR_Pos) | (0x1UL << SPI_CR1_BR_Pos)),
    SPI_BAUDRATEPRESCALER_128     = ((0x4UL << SPI_CR1_BR_Pos) | (0x2UL << SPI_CR1_BR_Pos)),
    SPI_BAUDRATEPRESCALER_256     = ((0x4UL << SPI_CR1_BR_Pos) | (0x2UL << SPI_CR1_BR_Pos) | (0x1UL << SPI_CR1_BR_Pos))
}SPI_BaudRatePrescalerTypeDef;

typedef enum
{
    SPI_FIRSTBIT_MSB              = (0x00000000U),
    SPI_FIRSTBIT_LSB              = SPI_CR1_LSBFIRST
}SPI_FirstBitTypeDef;

typedef enum
{
    SPI_CRCCALCULATION_DISABLE    = (0x00000000U),
    SPI_CRCCALCULATION_ENABLE     = SPI_CR1_CRCEN
}SPI_CRCCalculationTypeDef;


/**
  * @brief  SPI Configuration Structure definition
  */
typedef struct
{
    SPI_ModeTypeDef               Mode;                /*!< Specifies the SPI operating mode.
                                                        This parameter can be a value of @ref SPI_ModeTypeDef */

    SPI_DirectionTypeDef          Direction;           /*!< Specifies the SPI bidirectional mode state.
                                                        This parameter can be a value of @ref SPI_DirectionTypeDef */

    SPI_DataSizeTypeDef           DataSize;            /*!< Specifies the SPI data size.
                                                        This parameter can be a value of @ref SPI_DataSizeTypeDef */

    SPI_CLKPolarityTypeDef        CLKPolarity;         /*!< Specifies the serial clock steady state.
                                                        This parameter can be a value of @ref SPI_CLKPolarityTypeDef */

    SPI_CLKPhaseTypeDef           CLKPhase;            /*!< Specifies the clock active edge for the bit capture.
                                                        This parameter can be a value of @ref SPI_CLKPhaseTypeDef */

    SPI_NSSTypeDef                NSS;                 /*!< Specifies whether the NSS signal is managed by
                                                        hardware (NSS pin) or by software using the SSI bit.
                                                        This parameter can be a value of @ref SPI_NSSTypeDef */

    SPI_BaudRatePrescalerTypeDef  BaudRatePrescaler;   /*!< Specifies the Baud Rate prescaler value which will be
                                                        used to configure the transmit and receive SCK clock.
                                                        This parameter can be a value of @ref SPI_BaudRatePrescalerTypeDef
                                                        @note The communication clock is derived from the master
                                                        clock. The slave clock does not need to be set. */

    SPI_FirstBitTypeDef           FirstBit;            /*!< Specifies whether data transfers start from MSB or LSB bit.
                                                        This parameter can be a value of @ref SPI_FirstBitTypeDef */

    SPI_CRCCalculationTypeDef     CRCCalculation;      /*!< Specifies if the CRC calculation is enabled or not.
                                                        This parameter can be a value of @ref SPI_CRCCalculationTypeDef */

    uint32_t                      CRCPolynomial;       /*!< Specifies the polynomial used for the CRC calculation.
                                                        This parameter must be an odd number between Min_Data = 1 and Max_Data = 65535 */
} SPI_InitTypeDef;

/**
  * @brief  HAL SPI State structure definition
  */
typedef enum
{
    HAL_SPI_STATE_RESET      = 0x00U,    /*!< Peripheral not Initialized                         */
    HAL_SPI_STATE_READY      = 0x01U,    /*!< Peripheral Initialized and ready for use           */
    HAL_SPI_STATE_BUSY       = 0x02U,    /*!< an internal process is ongoing                     */
    HAL_SPI_STATE_BUSY_TX    = 0x03U,    /*!< Data Transmission process is ongoing               */
    HAL_SPI_STATE_BUSY_RX    = 0x04U,    /*!< Data Reception process is ongoing                  */
    HAL_SPI_STATE_BUSY_TX_RX = 0x05U,    /*!< Data Transmission and Reception process is ongoing */
    HAL_SPI_STATE_ERROR      = 0x06U,    /*!< SPI error state                                    */
    HAL_SPI_STATE_ABORT      = 0x07U     /*!< SPI abort is ongoing                               */
} HAL_SPI_StateTypeDef;

/**
  * @brief  SPI handle Structure definition
  */
typedef struct __SPI_HandleTypeDef
{
    SPI_TypeDef                *Instance;      /*!< SPI registers base address               */

    SPI_InitTypeDef            Init;           /*!< SPI communication parameters             */

    uint8_t                    *pTxBuffPtr;    /*!< Pointer to SPI Tx transfer Buffer        */

    uint16_t                   TxXferSize;     /*!< SPI Tx Transfer size                     */

    __IO uint16_t              TxXferCount;    /*!< SPI Tx Transfer Counter                  */

    uint8_t                    *pRxBuffPtr;    /*!< Pointer to SPI Rx transfer Buffer        */

    uint16_t                   RxXferSize;     /*!< SPI Rx Transfer size                     */

    __IO uint16_t              RxXferCount;    /*!< SPI Rx Transfer Counter                  */

    void (*RxISR)(struct __SPI_HandleTypeDef *pHSpi);   /*!< function pointer on Rx ISR       */

    void (*TxISR)(struct __SPI_HandleTypeDef *pHSpi);   /*!< function pointer on Tx ISR       */

    HAL_DMA_Handle_TypeDef     *pHDMA;

    HAL_LockTypeDef            Lock;           /*!< Locking object                           */

    __IO HAL_SPI_StateTypeDef  State;          /*!< SPI communication state                  */

    __IO uint32_t              ErrorCode;      /*!< SPI Error code                           */

} SPI_HandleTypeDef;


/**
  * @}
  */

/** @defgroup SPI_Exported_Constants SPI Exported Constants
  * @{
  */

/** @defgroup SPI_Error_Code SPI Error Code
  * @{
  */
#define HAL_SPI_ERROR_NONE              (0x00000000U)   /*!< No error                               */
#define HAL_SPI_ERROR_MODF              (0x00000001U)   /*!< MODF error                             */
#define HAL_SPI_ERROR_CRC               (0x00000002U)   /*!< CRC error                              */
#define HAL_SPI_ERROR_OVR               (0x00000004U)   /*!< OVR error                              */
#define HAL_SPI_ERROR_DMA               (0x00000010U)   /*!< DMA transfer error                     */
#define HAL_SPI_ERROR_FLAG              (0x00000020U)   /*!< Error on RXNE/TXE/BSY Flag             */
#define HAL_SPI_ERROR_ABORT             (0x00000040U)   /*!< Error during SPI Abort procedure       */
/**
  * @}
  */

/** @defgroup SPI_Interrupt_definition SPI Interrupt Definition
  * @{
  */
#define SPI_IT_TXE                      SPI_CR2_TXEIE
#define SPI_IT_RXNE                     SPI_CR2_RXNEIE
#define SPI_IT_ERR                      SPI_CR2_ERRIE
/**
  * @}
  */

/** @defgroup SPI_Flags_definition SPI Flags Definition
  * @{
  */
#define SPI_FLAG_RXNE                   SPI_SR_RXNE   /* SPI status flag: Rx buffer not empty flag       */
#define SPI_FLAG_TXE                    SPI_SR_TXE    /* SPI status flag: Tx buffer empty flag           */
#define SPI_FLAG_BSY                    SPI_SR_BSY    /* SPI status flag: Busy flag                      */
#define SPI_FLAG_CRCERR                 SPI_SR_CRCERR /* SPI Error flag: CRC error flag                  */
#define SPI_FLAG_MODF                   SPI_SR_MODF   /* SPI Error flag: Mode fault flag                 */
#define SPI_FLAG_OVR                    SPI_SR_OVR    /* SPI Error flag: Overrun flag                    */
#define SPI_FLAG_MASK                   (SPI_SR_RXNE | SPI_SR_TXE | SPI_SR_BSY\
                                         | SPI_SR_CRCERR | SPI_SR_MODF | SPI_SR_OVR)
/**
  * @}
  */


/** @defgroup SPI_Exported_Macros SPI Exported Macros
  * @{
  */

/** @brief  Reset SPI handle state.
  * @param  __HANDLE__ specifies the SPI Handle.
  * @retval None
  */
#define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)

/** @brief  Ready SPI handle state.
  * @param  __HANDLE__ specifies the SPI Handle.
  * @retval None
  */
#define __HAL_SPI_READY_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_READY)


/** @brief  Enable the specified SPI interrupts.
  * @param  __HANDLE__ specifies the SPI Handle.
  * @param  __INTERRUPT__ specifies the interrupt source to enable.
  *         This parameter can be one of the following values:
  *            @arg SPI_IT_TXE: Tx buffer empty interrupt enable
  *            @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
  *            @arg SPI_IT_ERR: Error interrupt enable
  * @retval None
  */
#define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__)   SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))

/** @brief  Disable the specified SPI interrupts.
  * @param  __HANDLE__ specifies the SPI handle.
  * @param  __INTERRUPT__ specifies the interrupt source to disable.
  *         This parameter can be one of the following values:
  *            @arg SPI_IT_TXE: Tx buffer empty interrupt enable
  *            @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
  *            @arg SPI_IT_ERR: Error interrupt enable
  * @retval None
  */
#define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__)  CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))

/** @brief  Enable the specified SPI DMA requeat.
  * @param  __HANDLE__ specifies the SPI handle.
  * @param  __DMA_REQUEST__ specifies the requeat source to disable.
  *         This parameter can be one of the following values:
  *            @arg SPI_CR2_TXDMAEN: DMA Tx buffer enable
  *            @arg SPI_CR2_RXDMAEN: DMA RX buffer enable
  * @retval None
  */
#define __HAL_SPI_ENABLE_DMA_REQUEST(__HANDLE__, __DMA_REQUEST__)  SET_BIT((__HANDLE__)->Instance->CR2, (__DMA_REQUEST__))

/** @brief  Disable the specified SPI DMA requeat.
  * @param  __HANDLE__ specifies the SPI handle.
  * @param  __DMA_REQUEST__ specifies the requeat source to disable.
  *         This parameter can be one of the following values:
  *            @arg SPI_CR2_TXDMAEN: DMA Tx buffer enable
  *            @arg SPI_CR2_RXDMAEN: DMA RX buffer enable
  * @retval None
  */
#define __HAL_SPI_DISABLE_DMA_REQUEST(__HANDLE__, __DMA_REQUEST__)  CLEAR_BIT((__HANDLE__)->Instance->CR2, (__DMA_REQUEST__))

/** @brief  Check whether the specified SPI interrupt source is enabled or not.
  * @param  __HANDLE__ specifies the SPI Handle.
  * @param  __INTERRUPT__ specifies the SPI interrupt source to check.
  *          This parameter can be one of the following values:
  *            @arg SPI_IT_TXE: Tx buffer empty interrupt enable
  *            @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
  *            @arg SPI_IT_ERR: Error interrupt enable
  * @retval The new state of __IT__ (TRUE or FALSE).
  */

#define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\
                                                              & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)

/** @brief  Check whether the specified SPI flag is set or not.
  * @param  __HANDLE__ specifies the SPI Handle.
  * @param  __FLAG__ specifies the flag to check.
  *         This parameter can be one of the following values:
  *            @arg SPI_FLAG_RXNE: Receive buffer not empty flag
  *            @arg SPI_FLAG_TXE: Transmit buffer empty flag
  *            @arg SPI_FLAG_CRCERR: CRC error flag
  *            @arg SPI_FLAG_MODF: Mode fault flag
  *            @arg SPI_FLAG_OVR: Overrun flag
  *            @arg SPI_FLAG_BSY: Busy flag
  * @retval The new state of __FLAG__ (TRUE or FALSE).
  */
#define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))

/** @brief  Clear the SPI CRCERR pending flag.
  * @param  __HANDLE__ specifies the SPI Handle.
  * @retval None
  */
#define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR))

/** @brief  Clear the SPI MODF pending flag.
  * @param  __HANDLE__ specifies the SPI Handle.
  * @retval None
  */
#define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__)             \
  do{                                                    \
    __IO uint32_t tmpreg_modf = 0x00U;                   \
    tmpreg_modf = (__HANDLE__)->Instance->SR;            \
    CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE); \
    UNUSED(tmpreg_modf);                                 \
  } while(0U)

/** @brief  Clear the SPI OVR pending flag.
  * @param  __HANDLE__ specifies the SPI Handle.
  * @retval None
  */
#define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__)        \
  do{                                              \
    __IO uint32_t tmpreg_ovr = 0x00U;              \
    tmpreg_ovr = (__HANDLE__)->Instance->DR;       \
    tmpreg_ovr = (__HANDLE__)->Instance->SR;       \
    UNUSED(tmpreg_ovr);                            \
  } while(0U)

/** @brief  Enable the SPI peripheral.
  * @param  __HANDLE__ specifies the SPI Handle.
  * @retval None
  */
#define __HAL_SPI_ENABLE(__HANDLE__)  SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)

/** @brief  Disable the SPI peripheral.
  * @param  __HANDLE__ specifies the SPI Handle.
  * @retval None
  */
#define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)

/**
  * @}
  */


/** @defgroup SPI_Private_Macros SPI Private Macros
  * @{
  */

/** @brief  Set the SPI transmit-only mode.
  * @param  __HANDLE__ specifies the SPI Handle.
  * @retval None
  */
#define SPI_1LINE_TX(__HANDLE__)  SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE)

/** @brief  Set the SPI receive-only mode.
  * @param  __HANDLE__ specifies the SPI Handle.
  * @retval None
  */
#define SPI_1LINE_RX(__HANDLE__)  CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE)

/** @brief  Reset the CRC calculation of the SPI.
  * @param  __HANDLE__ specifies the SPI Handle.
  * @retval None
  */
#define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCNEXT);\
                                    CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\
                                    SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0U)

/** @brief  Check whether the specified SPI flag is set or not.
  * @param  __SR__  copy of SPI SR register.
  * @param  __FLAG__ specifies the flag to check.
  *         This parameter can be one of the following values:
  *            @arg SPI_FLAG_RXNE: Receive buffer not empty flag
  *            @arg SPI_FLAG_TXE: Transmit buffer empty flag
  *            @arg SPI_FLAG_CRCERR: CRC error flag
  *            @arg SPI_FLAG_MODF: Mode fault flag
  *            @arg SPI_FLAG_OVR: Overrun flag
  *            @arg SPI_FLAG_BSY: Busy flag
  * @retval SET or RESET.
  */
#define SPI_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__) & ((__FLAG__) & SPI_FLAG_MASK)) == \
                                          ((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET)

/** @brief  Check whether the specified SPI Interrupt is set or not.
  * @param  __CR2__  copy of SPI CR2 register.
  * @param  __INTERRUPT__ specifies the SPI interrupt source to check.
  *         This parameter can be one of the following values:
  *            @arg SPI_IT_TXE: Tx buffer empty interrupt enable
  *            @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
  *            @arg SPI_IT_ERR: Error interrupt enable
  * @retval SET or RESET.
  */
#define SPI_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__) & (__INTERRUPT__)) == \
                                                     (__INTERRUPT__)) ? SET : RESET)

/** @brief  CHECK the parameter used init
  * @param
  * @retval None
  */
#define IS_SPI_ALL_INSTANCE(INSTANCE) ((INSTANCE) == SPI)

#define IS_SPI_MODE(__MODE__)      (((__MODE__) == SPI_MODE_SLAVE)   || \
                                    ((__MODE__) == SPI_MODE_MASTER))

#define IS_SPI_DIRECTION(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES)        || \
                                    ((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \
                                    ((__MODE__) == SPI_DIRECTION_1LINE))

#define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES)

#define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \
                                                    ((__MODE__) == SPI_DIRECTION_1LINE))

#define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \
                                       ((__DATASIZE__) == SPI_DATASIZE_8BIT))

#define IS_SPI_CPOL(__CPOL__)      (((__CPOL__) == SPI_POLARITY_LOW) || \
                                    ((__CPOL__) == SPI_POLARITY_HIGH))

#define IS_SPI_CPHA(__CPHA__)      (((__CPHA__) == SPI_PHASE_1EDGE) || \
                                    ((__CPHA__) == SPI_PHASE_2EDGE))

#define IS_SPI_NSS(__NSS__)        (((__NSS__) == SPI_NSS_SOFT)       || \
                                    ((__NSS__) == SPI_NSS_HARD_INPUT) || \
                                    ((__NSS__) == SPI_NSS_HARD_OUTPUT))

#define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2)   || \
                                                  ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4)   || \
                                                  ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8)   || \
                                                  ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16)  || \
                                                  ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32)  || \
                                                  ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64)  || \
                                                  ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \
                                                  ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256))

#define IS_SPI_FIRST_BIT(__BIT__)  (((__BIT__) == SPI_FIRSTBIT_MSB) || \
                                    ((__BIT__) == SPI_FIRSTBIT_LSB))

#define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \
                                                 ((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE))

#define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U)    && \
                                               ((__POLYNOMIAL__) <= 0xFFFFU) && \
                                              (((__POLYNOMIAL__)&0x1U) != 0U))

/**
  * @}
  */


/* Initialization/de-initialization functions  ********************************/
HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *pHSpi);
HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *pHSpi);
void HAL_SPI_MspInit(SPI_HandleTypeDef *pHSpi);
void HAL_SPI_MspDeInit(SPI_HandleTypeDef *pHSpi);

/* I/O operation functions  ***************************************************/
HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *pHSpi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *pHSpi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *pHSpi, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size,
                                          uint32_t Timeout);
HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *pHSpi, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *pHSpi, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *pHSpi, uint8_t *pTxData, uint8_t *pRxData,
                                             uint16_t Size);

HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *pHSpi);
HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *pHSpi);
HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *pHSpi);

/* Transfer Abort functions */
HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *pHSpi);
HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *pHSpi);

void HAL_SPI_IRQHandler(SPI_HandleTypeDef *pHSpi);
void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *pHSpi);
void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *pHSpi);
void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *pHSpi);
void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *pHSpi);
void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *pHSpi);
void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *pHSpi);
void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *pHSpi);
void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *pHSpi);
HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *pHSpi, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *pHSpi, uint8_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *pHSpi, uint8_t *pTxData, uint8_t *pRxData,uint16_t Size);
HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *pHSpi);
HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *pHSpi);
HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *pHSpi);
/* Peripheral State and Error functions ***************************************/
HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *pHSpi);
uint32_t             HAL_SPI_GetError(SPI_HandleTypeDef *pHSpi);
/**
  * @}
  */



#ifdef __cplusplus
}
#endif

#endif /* ZB32L03x_HAL_SPI_H */


